8]80(0T&amazon,omap4-kc1ti,omap4430ti,omap4 +&7Amazon Kindle Fire (first generation)chosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EL/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?V/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bj/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /ocp/dsp/ocp/ipu@55020000cpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugssinterrupt-controller@48241000arm,cortex-a9-gic !H$H$ cache-controller@48242000arm,pl310-cacheH$ 2@local-timer@48240600arm,cortex-a9-twd-timerH$  L  interrupt-controller@48281000ti,omap4-wugen-mpu !H( socti,omap-inframpu ti,omap4-mpumpuWiva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+\l3_main_1l3_main_2l3_main_3DD EL  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 caplaia0+$\J0J1J2segment@0 simple-bus+\`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ crevsyscm 0fck+ \@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`crev+ \` prm@0ti,omap4-prmsimple-bus  L + \ clocks+sys_clkin_ck@110{ ti,mux-clock abe_dpll_bypass_clk_mux_ck@108{ ti,mux-clock3abe_dpll_refclk_mux_ck@10c{ ti,mux-clock 2dbgclk_mux_ck{fixed-factor-clockl4_wkup_clk_mux_ck@108{ ti,mux-clocksyc_clk_div_ck@100{ti,divider-clockxusim_ck@1858{ti,divider-clockXusim_fclk@1858{ti,gate-clockXtrace_clk_div_ck{ti,clkdm-gate-clock bandgap_fclk@1888{ti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ \clk@20 ti,clkctrl \{emu_sys_cm@1a00 ti,omap4-cm+ \clk@20 ti,clkctrl {prm@400#ti,omap4-prm-instti,omap-prm-inst]prm@500#ti,omap4-prm-instti,omap-prm-instwprm@700#ti,omap4-prm-instti,omap-prm-instzprm@f00#ti,omap4-prm-instti,omap-prm-instprm@1b00#ti,omap4-prm-instti,omap-prm-inst@target-module@a000ti,sysc-omap4ti,sysccrev+ \scrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310{ ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310{ti,composite-mux-clock auxclk0_src_ck{ti,composite-clockauxclk0_ck@310{ti,divider-clock*auxclk1_src_gate_ck@314{ ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314{ti,composite-mux-clock auxclk1_src_ck{ti,composite-clockauxclk1_ck@314{ti,divider-clock+auxclk2_src_gate_ck@318{ ti,composite-no-wait-gate-clockauxclk2_src_mux_ck@318{ti,composite-mux-clock auxclk2_src_ck{ti,composite-clock auxclk2_ck@318{ti,divider-clock ,auxclk3_src_gate_ck@31c{ ti,composite-no-wait-gate-clock!auxclk3_src_mux_ck@31c{ti,composite-mux-clock "auxclk3_src_ck{ti,composite-clock!"#auxclk3_ck@31c{ti,divider-clock#-auxclk4_src_gate_ck@320{ ti,composite-no-wait-gate-clock $auxclk4_src_mux_ck@320{ti,composite-mux-clock  %auxclk4_src_ck{ti,composite-clock$%&auxclk4_ck@320{ti,divider-clock& .auxclk5_src_gate_ck@324{ ti,composite-no-wait-gate-clock$'auxclk5_src_mux_ck@324{ti,composite-mux-clock $(auxclk5_src_ck{ti,composite-clock'()auxclk5_ck@324{ti,divider-clock)$/auxclkreq0_ck@210{ ti,mux-clock*+,-./auxclkreq1_ck@214{ ti,mux-clock*+,-./auxclkreq2_ck@218{ ti,mux-clock*+,-./auxclkreq3_ck@21c{ ti,mux-clock*+,-./auxclkreq4_ck@220{ ti,mux-clock*+,-./ auxclkreq5_ck@224{ ti,mux-clock*+,-./$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup crevsyscm+ \scm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+x\@@PPtarget-module@0ti,sysc-omap2ti,sysccrevsyscsyssm fckdbclk+ \gpio@0ti,omap4-gpio L%5 !target-module@4000ti,sysc-omap2ti,sysc@@@crevsyscsyss"m fck+ \@wdt@0ti,omap4-wdtti,omap3-wdt LPtarget-module@8000ti,sysc-omap2-timerti,sysccrevsyscsyss' m  fck+ \AUtimer@0ti,omap3430-timer fcktimer_sys_ck L%` o target-module@c000ti,sysc-omap2ti,sysccrevsyscsyss' m Xfck+ \keypad@0ti,omap4-keypad Lxcmputarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-single@8+! pinmux_twl6030_wkup_pinsnsegment@20000 simple-bus+\``  00@@PPpptarget-module@0ti,sysc disabled+ \target-module@2000ti,sysc disabled+ \ target-module@4000ti,sysc disabled+ \@target-module@6000ti,sysc disabled+0\`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ caplaia0+T\JJJJ J (J(0J0segment@0 simple-bus+\ 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   crevsyscm+ \ scm@0ti,omap4-scm-coresimple-bus+ \scm_conf@0syscon+{control-phy@300ti,control-phy-usb2cpoweracontrol-phy@33cti,control-phy-otghs<cotghs_control_target-module@4000ti,sysc-omap4ti,sysc@crev+ \@cm1@0ti,omap4-cm1simple-bus + \ clocks+extalt_clkin_ck{ fixed-clockDpad_clks_src_ck{ fixed-clock0pad_clks_ck@108{ti,gate-clock0pad_slimbus_core_clks_ck{ fixed-clocksecure_32k_clk_src_ck{ fixed-clockslimbus_src_clk{ fixed-clock1slimbus_clk@108{ti,gate-clock1 sys_32k_ck{ fixed-clockvirt_12000000_ck{ fixed-clockvirt_13000000_ck{ fixed-clock]@ virt_16800000_ck{ fixed-clockY virt_19200000_ck{ fixed-clock$ virt_26000000_ck{ fixed-clock virt_27000000_ck{ fixed-clock virt_38400000_ck{ fixed-clockItie_low_clock_ck{ fixed-clockutmi_phy_clkout_ck{ fixed-clockxclk60mhsp1_ck{ fixed-clockZxclk60mhsp2_ck{ fixed-clock[xclk60motg_ck{ fixed-clockdpll_abe_ck@1e0{ti,omap4-dpll-m4xen-clock234dpll_abe_x2_ck@1f0{ti,omap4-dpll-x2-clock45dpll_abe_m2x2_ck@1f0{ti,divider-clock5 6abe_24m_fclk{fixed-factor-clock6abe_clk@108{ti,divider-clock64dpll_abe_m3x2_ck@1f4{ti,divider-clock5 7core_hsd_byp_clk_mux_ck@12c{ ti,mux-clock7,8dpll_core_ck@120{ti,omap4-dpll-core-clock8 $,(9dpll_core_x2_ck{ti,omap4-dpll-x2-clock9:dpll_core_m6x2_ck@140{ti,divider-clock: @dpll_core_m2_ck@130{ti,divider-clock9 0;ddrphy_ck{fixed-factor-clock;dpll_core_m5x2_ck@13c{ti,divider-clock: <<div_core_ck@100{ti,divider-clock<Gdiv_iva_hs_clk@1dc{ti,divider-clock<4@div_mpu_hs_clk@19c{ti,divider-clock<4Fdpll_core_m4x2_ck@138{ti,divider-clock: 8=dll_clk_div_ck{fixed-factor-clock=dpll_abe_m2_ck@1f0{ti,divider-clock4Jdpll_core_m3x2_gate_ck@134{ ti,composite-no-wait-gate-clock:4>dpll_core_m3x2_div_ck@134{ti,composite-divider-clock:4?dpll_core_m3x2_ck{ti,composite-clock>?dpll_core_m7x2_ck@144{ti,divider-clock: Diva_hsd_byp_clk_mux_ck@1ac{ ti,mux-clock@Adpll_iva_ck@1a0{ti,omap4-dpll-clockAoBJ7Bdpll_iva_x2_ck{ti,omap4-dpll-x2-clockBCdpll_iva_m4x2_ck@1b8{ti,divider-clockC oDJ~Ddpll_iva_m5x2_ck@1bc{ti,divider-clockC oEJ] Edpll_mpu_ck@160{ti,omap4-dpll-clockF`dlhdpll_mpu_m2_ck@170{ti,divider-clock pper_hs_clk_div_ck{fixed-factor-clock7Kusb_hs_clk_div_ck{fixed-factor-clock7Ql3_div_ck@100{ti,divider-clockGHl4_div_ck@100{ti,divider-clockHlp_clk_div_ck{fixed-factor-clock6mpu_periphclk{fixed-factor-clockocp_abe_iclk@528{ti,divider-clock I(per_abe_24m_fclk{fixed-factor-clockJdummy_ck{ fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ \clk@20 ti,clkctrl {tesla_cm@400 ti,omap4-cm+ \clk@20 ti,clkctrl {\abe_cm@500 ti,omap4-cm+ \clk@20 ti,clkctrl l{Itarget-module@8000ti,sysc-omap4ti,sysccrev+ \ cm2@0ti,omap4-cm2simple-bus + \ clocks+per_hsd_byp_clk_mux_ck@14c{ ti,mux-clockKLLdpll_per_ck@140{ti,omap4-dpll-clockL@DLHMdpll_per_m2_ck@150{ti,divider-clockMPUdpll_per_x2_ck@150{ti,omap4-dpll-x2-clockMPNdpll_per_m2x2_ck@150{ti,divider-clockN PTdpll_per_m3x2_gate_ck@154{ ti,composite-no-wait-gate-clockNTOdpll_per_m3x2_div_ck@154{ti,composite-divider-clockNTPdpll_per_m3x2_ck{ti,composite-clockOPdpll_per_m4x2_ck@158{ti,divider-clockN Xdpll_per_m5x2_ck@15c{ti,divider-clockN \dpll_per_m6x2_ck@160{ti,divider-clockN `Sdpll_per_m7x2_ck@164{ti,divider-clockN ddpll_usb_ck@180{ti,omap4-dpll-j-type-clockQRdpll_usb_clkdcoldo_ck@1b4{ti,fixed-factor-clockR_ ldpll_usb_m2_ck@190{ti,divider-clockR Vducati_clk_mux_ck@100{ ti,mux-clockGSfunc_12m_fclk{fixed-factor-clockTfunc_24m_clk{fixed-factor-clockUfunc_24mc_fclk{fixed-factor-clockTfunc_48m_fclk@108{ti,divider-clockTfunc_48mc_fclk{fixed-factor-clockTfunc_64m_fclk@108{ti,divider-clockfunc_96m_fclk@108{ti,divider-clockTinit_60m_fclk@104{ti,divider-clockVYper_abe_nc_fclk@108{ti,divider-clockJusb_phy_cm_clk32k@640{ti,gate-clock@bclockdomainsl3_init_clkdmti,clockdomainRl4_ao_cm@600 ti,omap4-cm+ \clk@20 ti,clkctrl {dl3_1_cm@700 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_2_cm@800 ti,omap4-cm+ \clk@20 ti,clkctrl {ducati_cm@900 ti,omap4-cm + \ clk@20 ti,clkctrl {yl3_dma_cm@a00 ti,omap4-cm + \ clk@20 ti,clkctrl {Wl3_emif_cm@b00 ti,omap4-cm + \ clk@20 ti,clkctrl {d2d_cm@c00 ti,omap4-cm + \ clk@20 ti,clkctrl {cl4_cfg_cm@d00 ti,omap4-cm + \ clk@20 ti,clkctrl {el3_instr_cm@e00 ti,omap4-cm+ \clk@20 ti,clkctrl ${ivahd_cm@f00 ti,omap4-cm+ \clk@20 ti,clkctrl {iss_cm@1000 ti,omap4-cm+ \clk@20 ti,clkctrl {gl3_dss_cm@1100 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_gfx_cm@1200 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_init_cm@1300 ti,omap4-cm+ \clk@20 ti,clkctrl {Xl4_per_cm@1400 ti,omap4-cm+ \clock@20ti,clkctrl-l4-perti,clkctrl D{hclock@1a0 ti,clkctrl-l4-secureti,clkctrl<{qtarget-module@56000ti,sysc-omap2ti,sysc``,`(crevsyscsyss# z m Wfck+ \`dma-controller@0ti,omap4430-sdmati,omap-sdma0L   rtarget-module@58000ti,sysc-omap2ti,sysccrevsyscsyss#zm Xfck+ \Phsi@0 ti,omap4-hsi@Pcsysgdd Xhsi_fck LGgdd_mpu+ \@hsi-port@2000ti,omap4-hsi-port (ctxrx LChsi-port@3000ti,omap4-hsi-port08ctxrx LDtarget-module@5e000ti,sysc disabled+ \ target-module@62000ti,sysc-omap2ti,sysc   crevsyscsyss m XHfck+ \ usbhstll@0 ti,usbhs-tll LNtarget-module@64000ti,sysc-omap4ti,sysc@@@crevsyscsysszm X8fck+ \@usbhshost@0ti,usbhs-host+ \ YZ[3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2ohci@800ti,ohci-omap3 LLehci@c00 ti,ehci-omap  LMtarget-module@66000ti,sysc-omap2ti,sysc```crevsyscsyss m \fck]rstctrl+ \`mmu@0ti,omap4-iommu L|segment@80000 simple-bus+\      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ \target-module@2b000ti,sysc-omap2ti,sysccrevsyscsyss zm X@fck+ \usb_otg_hs@0ti,omap4-musbL\]mcdma^^ usb2-phy  (_4defaultB`L[`2target-module@2d000ti,sysc-omap2ti,sysccrevsyscsyss m Xfck+ \ocp2scp@0ti,omap-ocp2scp+ \usb2phy@80 ti,omap-usb2X(abwkupclkf^target-module@36000ti,sysc-omap2ti,sysc```crevsyscsyssm cfck+ \`target-module@4d000ti,sysc-omap2ti,sysccrevsyscsyssm cfck+ \target-module@59000ti,sysc-omap4-srti,sysc8csyscm dfck+ \smartreflex@0ti,omap4-smartreflex-mpu Ltarget-module@5b000ti,sysc-omap4-srti,sysc8csyscm dfck+ \smartreflex@0ti,omap4-smartreflex-iva Lftarget-module@5d000ti,sysc-omap4-srti,sysc8csyscm dfck+ \smartreflex@0ti,omap4-smartreflex-core Ltarget-module@60000ti,sysc disabled+ \target-module@74000ti,sysc-omap4ti,sysc@@ crevsysc m efck+ \@mailbox@0ti,omap4-mailbox Lq}}mbox-ipu  mbox-dsp  ~target-module@76000ti,sysc-omap2ti,sysc```crevsyscsyss m efck+ \`spinlock@0ti,omap4-hwspinlocksegment@100000 simple-bus+`\  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-single@+! 4defaultjpinmux_uart3_pinsipinmux_i2c1_pinslpinmux_i2c2_pinsppinmux_i2c3_pinskpinmux_i2c4_pinsvpinmux_mmc2_pinsP  BDtpinmux_usb_otg_hs_pinsTVX`pinmux_twl6030_pins^Amomap4_padconf_global@5a0sysconsimple-busp+ \pfpbias_regulator@60ti,pbias-omap4ti,pbias-omap`fpbias_mmc_omap4pbias_mmc_omap4w@-starget-module@2000ti,sysc disabled+ \ target-module@8000ti,sysc disabled+ \target-module@a000ti,sysc-omap4ti,sysc crevsysc z m  gfck+ \segment@180000 simple-bus+segment@200000 simple-bus+h\!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ \@target-module@6000ti,sysc disabled+ \`target-module@a000ti,sysc disabled+ \target-module@c000ti,sysc disabled+ \target-module@10000ti,sysc disabled+ \target-module@12000ti,sysc disabled+ \ target-module@14000ti,sysc disabled+ \@target-module@16000ti,sysc disabled+ \`target-module@18000ti,sysc disabled+ \target-module@1c000ti,sysc disabled+ \target-module@1e000ti,sysc disabled+ \target-module@20000ti,sysc disabled+ \target-module@26000ti,sysc disabled+ \`target-module@28000ti,sysc disabled+ \target-module@2a000ti,sysc disabled+ \segment@280000 simple-bus+segment@300000 simple-bus+\042@@2@ `2`p2p2232 2@target-module@0ti,sysc disabled+x\@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHHcaplaia0ia1ia2ia3+\H H segment@0 simple-bus+\  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXcrevsyscsyssm h0fck+ \serial@0ti,omap4-uart LJl4defaultBiJjtarget-module@32000ti,sysc-omap2-timerti,sysc   crevsyscsyss' m hfck+ \ timer@0ti,omap3430-timerhfcktimer_sys_ck L&target-module@34000ti,sysc-omap4-timerti,sysc@@ crevsyscm h fck+ \@timer@0ti,omap4430-timerh fcktimer_sys_ck L'target-module@36000ti,sysc-omap4-timerti,sysc`` crevsyscm h(fck+ \`timer@0ti,omap4430-timerh(fcktimer_sys_ck L(target-module@3e000ti,sysc-omap4-timerti,sysc crevsyscm h0fck+ \timer@0ti,omap4430-timerh0fcktimer_sys_ck L-0target-module@40000ti,sysc disabled+ \target-module@55000ti,sysc-omap2ti,syscPPQcrevsyscsyssmh@h@ fckdbclk+ \Pgpio@0ti,omap4-gpio L%5 !target-module@57000ti,sysc-omap2ti,syscppqcrevsyscsyssmhHhH fckdbclk+ \pgpio@0ti,omap4-gpio L%5 !target-module@59000ti,sysc-omap2ti,sysccrevsyscsyssmhPhP fckdbclk+ \gpio@0ti,omap4-gpio L %5 !target-module@5b000ti,sysc-omap2ti,sysccrevsyscsyssmhXhX fckdbclk+ \gpio@0ti,omap4-gpio L!%5 !target-module@5d000ti,sysc-omap2ti,sysccrevsyscsyssmh`h` fckdbclk+ \gpio@0ti,omap4-gpio L"%5 !target-module@60000ti,sysc-omap2ti,sysccrevsyscsyssm hfck+ \i2c@0 ti,omap4-i2c L=+4defaultBktarget-module@6a000ti,sysc-omap2ti,syscPTXcrevsyscsyssm h fck+ \serial@0ti,omap4-uart LHltarget-module@6c000ti,sysc-omap2ti,syscPTXcrevsyscsyssm h(fck+ \serial@0ti,omap4-uart LIltarget-module@6e000ti,sysc-omap2ti,syscPTXcrevsyscsyssm h8fck+ \serial@0ti,omap4-uart LFltarget-module@70000ti,sysc-omap2ti,sysccrevsyscsyssm hfck+ \i2c@0 ti,omap4-i2c L8+4defaultBltwl@48H L ti,twl6030 !4defaultBmnpowerti,twl6030-power=rtcti,twl4030-rtcL regulator-vaux1ti,twl6030-vaux1B@-uregulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-regulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusimO,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioXregulator-vusbti,twl6030-vusboregulator-v1v8ti,twl6030-v1v8Xregulator-v2v1ti,twl6030-v2v1Xusb-comparatorti,twl6030-usbL lopwmti,twl6030-pwmwpwmledti,twl6030-pwmledwgpadcti,twl6030-gpadcLtarget-module@72000ti,sysc-omap2ti,sysc   crevsyscsyssm hfck+ \ i2c@0 ti,omap4-i2c L9+4defaultBptarget-module@76000ti,sysc-omap4ti,sysc`` crevsyscm hfck+ \`target-module@78000ti,sysc-omap2ti,sysccrevsyscsyss m h8fck+ \elm@0ti,am3352-elm  L disabledtarget-module@86000ti,sysc-omap2-timerti,sysc```crevsyscsyss' m hfck+ \`timer@0ti,omap3430-timerhfcktimer_sys_ck L.0target-module@88000ti,sysc-omap4-timerti,sysc crevsyscm hfck+ \timer@0ti,omap4430-timerhfcktimer_sys_ck L/0target-module@90000ti,sysc-omap2ti,sysc   crevsyscm q fck+ \ rng@0 ti,omap4-rng  L4target-module@96000ti,sysc-omap2ti,sysc `csysc m hfck+ \ `mcbsp@0ti,omap4-mcbspcmpu Lcommonrr txrx disabledtarget-module@98000ti,sysc-omap4ti,sysc   crevsyscm hfck+ \ spi@0ti,omap4-mcspi LA+@r#r$r%r&r'r(r)r* tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc   crevsyscm hfck+ \ spi@0ti,omap4-mcspi LB+ r+r,r-r.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc   crevsysczm Xfck+ \ mmc@0ti,omap4-hsmmc LSr=r>txrxs disabledtarget-module@9e000ti,sysc disabled+ \ target-module@a2000ti,sysc disabled+ \ target-module@a4000ti,sysc disabled+\ @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8crevsyscsyssm qfck+ \ Pdes@0 ti,omap4-des LRrurttxrxtarget-module@a8000ti,sysc disabled+ \ @target-module@ad000ti,sysc-omap4ti,sysc   crevsysczm hfck+ \ mmc@0ti,omap4-hsmmc L^rMrNtxrx disabledtarget-module@b0000ti,sysc disabled+ \ target-module@b2000ti,sysc-omap2ti,sysc   crevsyscsyssA hhfck+ \ 1w@0 ti,omap3-1w L:target-module@b4000ti,sysc-omap4ti,sysc @ @ crevsysczm Xfck+ \ @mmc@0ti,omap4-hsmmc LVr/r0txrx4defaultBtutarget-module@b8000ti,sysc-omap4ti,sysc   crevsyscm hfck+ \ spi@0ti,omap4-mcspi L[+rrtx0rx0target-module@ba000ti,sysc-omap4ti,sysc   crevsyscm hfck+ \ spi@0ti,omap4-mcspi L0+rFrGtx0rx0target-module@d1000ti,sysc-omap4ti,sysc   crevsysczm hfck+ \ mmc@0ti,omap4-hsmmc L`r9r:txrx disabledtarget-module@d5000ti,sysc-omap4ti,sysc P P crevsysczm h@fck+ \ Pmmc@0ti,omap4-hsmmc L;r;r<txrxsegment@200000 simple-bus+\55target-module@150000ti,sysc-omap2ti,sysccrevsyscsyssm hfck+ \i2c@0 ti,omap4-i2c L>+4defaultBvinterconnect@40100000ti,omap4-l4-abesimple-pm-bus@@claapw+\@IIsegment@0simple-pm-bus+0\  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc csysc m I(fck+\ I I mcbsp@0ti,omap4-mcbspI cmpudma Lcommonr!r"txrx disabledtarget-module@24000ti,sysc-omap2ti,sysc@csysc m I0fck+\@I@I@mcbsp@0ti,omap4-mcbspI@cmpudma Lcommonrrtxrx disabledtarget-module@26000ti,sysc-omap2ti,sysc`csysc m I8fck+\`I`I`mcbsp@0ti,omap4-mcbspI`cmpudma Lcommonrrtxrx disabledtarget-module@28000ti,sysc-mcaspti,sysc crevsyscm I fck+\IItarget-module@2a000ti,sysc disabled+\IItarget-module@2e000ti,sysc-omap4ti,sysc crevsyscm Ifck+\IIdmic@0ti,omap4-dmicIcmpudma LrrCup_link disabledtarget-module@30000ti,sysc-omap2ti,sysccrevsyscsyss"m Ihfck+\IIwdt@0ti,omap4-wdtti,omap3-wdt LPtarget-module@32000ti,sysc-omap4ti,sysc   crevsyscm Ifck+\ I I  disabledmcpdm@0ti,omap4-mcpdmI cmpudma LprArBup_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,sysc crevsyscm IHfck+\IItimer@0ti,omap4430-timerIIHxfcktimer_sys_ck L)&target-module@3a000ti,sysc-omap4-timerti,sysc crevsyscm IPfck+\IItimer@0ti,omap4430-timerIIPxfcktimer_sys_ck L*&target-module@3c000ti,sysc-omap4-timerti,sysc crevsyscm IXfck+\IItimer@0ti,omap4430-timerIIXxfcktimer_sys_ck L+&target-module@3e000ti,sysc-omap4-timerti,sysc crevsyscm I`fck+\IItimer@0ti,omap4430-timerII`xfcktimer_sys_ck L,0&target-module@80000ti,sysc disabled+\IItarget-module@a0000ti,sysc disabled+\ I I target-module@c0000ti,sysc disabled+\ I I target-module@f1000ti,sysc-omap4ti,sysc crevsyscz m Ifck+\IIsram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+ Lrrxtx3?gpmcQHfck !%5target-module@52000000ti,sysc-omap4ti,syscissRR crevsysczm  gfck+ \Rtarget-module@55082000ti,sysc-omap2ti,syscU U U crevsyscsyss m yfckzrstctrl \U +mmu@0ti,omap4-iommu Lddtarget-module@4012c000ti,sysc-omap4ti,sysc@@ crevsyscm I@fck+\@IIdmm@4e000000 ti,omap4-dmmN Lqdmmemif@4c000000 ti,emif-4dL Lnemif1Qzemif@4d000000 ti,emif-4dM Loemif2Qzdsp ti,omap4-dsp {|] \omap4-dsp-fw.xe64T}~ disabledipu@55020000 ti,omap4-ipuUcl2ramzz yomap4-ipu-fw.xem3} disabledtarget-module@4b501000ti,sysc-omap2ti,syscKPKPKPcrevsyscsyssm qfck+ \KPaes@0 ti,omap4-aes LUrorntxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKpcrevsyscsyssm qfck+ \Kpaes@0 ti,omap4-aes L@rrrqtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKcrevsyscsyss m q(fck+ \Ksham@0ti,omap4-sham L3rwrxregulator-abb-mpu ti,abb-v2abb_mpu+2okayJ0{J0`cbase-addressint-addressx#O1regulator-abb-iva ti,abb-v2abb_iva+2 disabledJ0{J0`cbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscVV crevsysczm fck+ \VoJ 'target-module@58000000ti,sysc-omap2ti,syscXX crevsyss0 fckhdmi_clksys_clktv_clk+ \Xdss@0 ti,omap4-dss disabled fck+ \target-module@1000ti,sysc-omap2ti,sysccrevsyscsyss m z  fcksys_clk+ \dispc@0ti,omap4-dispc L fcktarget-module@2000ti,sysc-omap2ti,sysc   crevsyscsyss m  fcksys_clk+ \ encoder@0 disabledHfckicktarget-module@3000ti,sysc-omap2ti,sysc0crev sys_clk+ \0encoder@0ti,omap4-venc disabled fcktarget-module@4000ti,sysc-omap2ti,sysc@@@crevsyscsyss m+ \@encoder@0 ti,omap4-dsi@ cprotophypll L5 disabled  fcksys_clk+target-module@5000ti,sysc-omap2ti,syscPPPcrevsyscsyss m+ \Pencoder@0 ti,omap4-dsi@ cprotophypll LT disabled  fcksys_clk+target-module@6000ti,sysc-omap4ti,sysc`` crevsyscm  fckdss_clk+ \` encoder@0ti,omap4-hdmi cwppllphycore Le disabled  fcksys_clkrL audio_txbandgap@4a002260J"`J#,ti,omap4430-bandgap /5thermal-zonescpu_thermalKaoN tripscpu_alertpassivecpu_critH criticalcooling-mapsmap0 memory@80000000memory pwmleds pwm-ledsgreengreen w5orangeorange w5 compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#reset-cells#power-domain-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parents#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesremote-wakeup-connectedresetsreset-names#iommu-cellsusb-phyphysphy-namesmultipointnum-epsram-bitsctrl-modulepinctrl-namespinctrl-0interface-typemodepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmti,system-power-controllerregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyti,non-removablebus-widthpower-domainsti,timer-dspgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infogpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicelabelpwmsmax-brightness