,8( H%goldelico,gta04ti,omap3630ti,omap3 +7Goldelico GTA04A5/Letux 2804chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/serial@4806a000j/ocp@68000000/serial@4806c000r/ocp@68000000/serial@49020000z/ocp@68000000/serial@49042000/spi/td028ttec1@0 /connectorcpus+cpu@0arm,cortex-a8cpucpu pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+#2CXvdefaulthsusb2-pins0      uart1-pinsRLuart2-pinsJHuart3-pinsnpmmc1-pins0backlight-pinmux-pins+dss-dpi-pinsgps-pinsF hdq-pinsbmp085-pinsbma180-pins itg3200-pinshmc5843-pinspenirq-pinsdcamera-pins mcbsp1-pins0\^`bfhmcbsp2-pins  mcbsp3-pins <>@Bmcbsp4-pinsTVZ twl4030-pinsAbt-pins6wlan-pins82wlan-irq-pins:irda-pinspps-pins3pinmux-bno050-pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselh+clock-mcbsp5-mux-fck@4ti,composite-mux-clockmcbsp5_mux_fck  clock-mcbsp3-mux-fck@0ti,composite-mux-clockmcbsp3_mux_fck clock-mcbsp4-mux-fck@2ti,composite-mux-clockmcbsp4_mux_fck mcbsp5_fckti,composite-clock  clock@4 ti,clksel+clock-mcbsp1-mux-fck@2ti,composite-mux-clockmcbsp1_mux_fck clock-mcbsp2-mux-fck@6ti,composite-mux-clockmcbsp2_mux_fck mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clock clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+#2CXvgpio1-pinsAAtwl4030-vpins-pins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `L%revsyscsyss/ <Jick+ H ` aes1@0 ti,omap3-aesPW  \txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PL%revsyscsyss/ <Jick+ H P aes2@0 ti,omap3-aesPWAB\txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockfYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockvp#sys_clkout1@d70ti,gate-clock pvdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock "dpll4_x2_ckfixed-factor-clock!corex2_fckfixed-factor-clock"$wkup_l4_ickfixed-factor-clock#ccorex2_d3_fckfixed-factor-clock$corex2_d5_fckfixed-factor-clock$clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockfomap_32k_fck fixed-clockfIvirt_12m_ck fixed-clockfvirt_13m_ck fixed-clockf]@virt_19200000_ck fixed-clockf$virt_26000000_ck fixed-clockfvirt_38_4m_ck fixed-clockfIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!? H%dpll4_m2x2_mul_ckfixed-factor-clock%&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock&v 'omap_96m_alwon_fckfixed-factor-clock'3dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0clock@1140 ti,clksel@+clock-dpll3-m3@16ti,divider-clock dpll3_m3_ck-clock-dpll4-m6@24ti,divider-clock dpll4_m6_ck!??clock-emu-src-mux@0 ti,mux-clockemu_src_mux_ck#()*wclock-pclk-fck@8ti,divider-clock pclk_fck+clock-pclkx2-fck@6ti,divider-clock pclkx2_fck+clock-atclk-fck@4ti,divider-clock atclk_fck+clock-traceclk-src-fck@2 ti,mux-clocktraceclk_src_fck#()*,clock-traceclk-fck@11 ti,divider-clock traceclk_fck,dpll3_m3x2_mul_ckfixed-factor-clock-.dpll3_m3x2_ck@d00ti,hsdiv-gate-clock.v  /emu_core_alwon_ckfixed-factor-clock/(sys_altclk fixed-clockf6mcbsp_clks fixed-clockf core_ckfixed-factor-clock 0dpll1_fck@940ti,divider-clock0v @1dpll1_ck@904ti,omap3-dpll-clock#1  $ @ 4dpll1_x2_ckfixed-factor-clock2dpll1_x2m2_ck@944ti,divider-clock2 DFcm_96m_fckfixed-factor-clock34clock@d40 ti,clksel @+clock-dpll3-m2@27ti,divider-clock dpll3_m2_ck clock-omap-96m-fck@6 ti,mux-clock omap_96m_fck4#Zclock-omap-54m-fck@5 ti,mux-clock omap_54m_fck56Bclock-omap-48m-fck@3 ti,mux-clock omap_48m_fck76:clock@e40 ti,clksel@+clock-dpll4-m3@8ti,divider-clock dpll4_m3_ck! 8clock-dpll4-m4@0ti,divider-clock dpll4_m4_ck!;dpll4_m3x2_mul_ckfixed-factor-clock89dpll4_m3x2_ck@d00ti,hsdiv-gate-clock9v 5cm_96m_d2_fckfixed-factor-clock47omap_12m_fckfixed-factor-clock:[dpll4_m4x2_mul_ckti,fixed-factor-clock;<dpll4_m4x2_ck@d00ti,gate-clock<v _dpll4_m5_ck@f40ti,divider-clock!?@=dpll4_m5x2_mul_ckti,fixed-factor-clock=>dpll4_m5x2_ck@d00ti,hsdiv-gate-clock>v {dpll4_m6x2_mul_ckfixed-factor-clock?@dpll4_m6x2_ck@d00ti,hsdiv-gate-clock@v Aemu_per_alwon_ckfixed-factor-clockA)clock@d70 ti,clksel p+clock-clkout2-src-gate@7 ti,composite-no-wait-gate-clockclkout2_src_gate_ck0Dclock-clkout2-src-mux@0ti,composite-mux-clockclkout2_src_mux_ck0#4BEclock-sys-clkout2@3ti,divider-clock sys_clkout2C@clkout2_src_ckti,composite-clockDECmpu_ckfixed-factor-clockFGarm_fck@924ti,divider-clockG $emu_mpu_alwon_ckfixed-factor-clockG*clock@a40 ti,clksel @+clock-l3-ick@0ti,divider-clockl3_ick0Hclock-l4-ick@2ti,divider-clockl4_ickHJclock-gpt10-mux-fck@6ti,composite-mux-clockgpt10_mux_fckI#Wclock-gpt11-mux-fck@7ti,composite-mux-clockgpt11_mux_fckI#Yclock-ssi-ssr-div-fck-3430es2@8ti,composite-divider-clockssi_ssr_div_fck_3430es2$$clock@c40 ti,clksel @+clock-rm-ick@1ti,divider-clockrm_ickJclock-gpt1-mux-fck@0ti,composite-mux-clock gpt1_mux_fckI#bclock-usim-mux-fck@3ti,composite-mux-clock usim_mux_fck(#KLMNOPQRSclock@a00 ti,clksel +clock-gpt10-gate-fck@11 ti,composite-gate-clockgpt10_gate_fck#Vclock-gpt11-gate-fck@12 ti,composite-gate-clockgpt11_gate_fck#Xclock-mmchs2-fck@25ti,wait-gate-clock mmchs2_fckclock-mmchs1-fck@24ti,wait-gate-clock mmchs1_fckclock-i2c3-fck@17ti,wait-gate-clock i2c3_fckclock-i2c2-fck@16ti,wait-gate-clock i2c2_fckclock-i2c1-fck@15ti,wait-gate-clock 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mmchs2_ick]clock-mmchs1-ick@24ti,omap3-interface-clock mmchs1_ick]clock-hdq-ick@22ti,omap3-interface-clockhdq_ick]clock-mcspi4-ick@21ti,omap3-interface-clock mcspi4_ick]clock-mcspi3-ick@20ti,omap3-interface-clock mcspi3_ick]clock-mcspi2-ick@19ti,omap3-interface-clock mcspi2_ick]clock-mcspi1-ick@18ti,omap3-interface-clock mcspi1_ick]clock-i2c3-ick@17ti,omap3-interface-clock i2c3_ick]clock-i2c2-ick@16ti,omap3-interface-clock i2c2_ick]clock-i2c1-ick@15ti,omap3-interface-clock i2c1_ick]clock-uart2-ick@14ti,omap3-interface-clock uart2_ick]clock-uart1-ick@13 ti,omap3-interface-clock uart1_ick]clock-gpt11-ick@12 ti,omap3-interface-clock gpt11_ick]clock-gpt10-ick@11 ti,omap3-interface-clock gpt10_ick]clock-mcbsp5-ick@10 ti,omap3-interface-clock mcbsp5_ick]clock-mcbsp1-ick@9 ti,omap3-interface-clock mcbsp1_ick]clock-omapctrl-ick@6ti,omap3-interface-clock omapctrl_ick]clock-aes2-ick@28ti,omap3-interface-clock aes2_ick]clock-sha12-ick@27ti,omap3-interface-clock sha12_ick]clock-icr-ick@29ti,omap3-interface-clockicr_ick]clock-des2-ick@26ti,omap3-interface-clock des2_ick]clock-mspro-ick@23ti,omap3-interface-clock mspro_ick]clock-mailboxes-ick@7ti,omap3-interface-clockmailboxes_ick]clock-sad2d-ick@3ti,omap3-interface-clock sad2d_ickHclock-hsotgusb-ick-3430es2@4"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2\clock-ssi-ick-3430es2@0ti,omap3-ssi-interface-clockssi_ick_3430es2^clock-mmchs3-ick@30ti,omap3-interface-clock mmchs3_ick]gpmc_fckfixed-factor-clock\core_l4_ickfixed-factor-clockJ]clock@e00 ti,clksel+clock-dss-tv-fckti,gate-clock dss_tv_fckBvclock-dss-96m-fckti,gate-clock dss_96m_fckZvclock-dss2-alwon-fckti,gate-clockdss2_alwon_fck#vclock-dss1-alwon-fck-3430es2@0ti,dss-gate-clockdss1_alwon_fck_3430es2_dummy_ck fixed-clockfclock@c00 ti,clksel +clock-gpt1-gate-fck@0ti,composite-gate-clockgpt1_gate_fck#aclock-gpio1-dbck@3ti,gate-clock gpio1_dbck`clock-wdt2-fck@5ti,wait-gate-clock wdt2_fck`clock-sr1-fck@6ti,wait-gate-clocksr1_fck#clock-sr2-fck@7ti,wait-gate-clocksr2_fck#clock-usim-gate-fck@9 ti,composite-gate-clockusim_gate_fckZgpt1_fckti,composite-clockab wkup_32k_fckfixed-factor-clockI`clock@c10 ti,clksel +clock-wdt2-ick@5ti,omap3-interface-clock wdt2_ickcclock-wdt1-ick@4ti,omap3-interface-clock wdt1_ickcclock-gpio1-ick@3ti,omap3-interface-clock gpio1_ickcclock-omap-32ksync-ick@2ti,omap3-interface-clockomap_32ksync_ickcclock-gpt12-ick@1ti,omap3-interface-clock gpt12_ickcclock-gpt1-ick@0ti,omap3-interface-clock gpt1_ickcclock-usim-ick@9 ti,omap3-interface-clock usim_ickcper_96m_fckfixed-factor-clock3 per_48m_fckfixed-factor-clock:dclock@1000 ti,clksel+clock-uart3-fck@11 ti,wait-gate-clock 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aes1_ickyclock-rng-ick@2ti,omap3-interface-clockrng_ickyclock-sha11-ick@1ti,omap3-interface-clock sha11_ickyclock-des1-ick@0ti,omap3-interface-clock des1_ickyclock-pka-ick@4ti,omap3-interface-clockpka_ickzclock@f00 ti,clksel+clock-cam-mclk@0ti,gate-clock cam_mclk{clock-csi2-96m-fck@1ti,gate-clock csi2_96m_fckcam_ick@f10!ti,omap3-no-wait-interface-clockJvsecurity_l3_ickfixed-factor-clockHzssi_l4_ickfixed-factor-clockJ^sr_l4_ickfixed-factor-clockJdpll2_fck@40ti,divider-clock0v@|dpll2_ck@4ti,omap3-dpll-clock#|$@4 2:}dpll2_m2_ck@44ti,divider-clock}D~iva2_ck@0ti,wait-gate-clock~vclock@a18 ti,clksel N+clock-mad2d-ick@3ti,omap3-interface-clock mad2d_ickHclock-usbtll-ick@2ti,omap3-interface-clock usbtll_ick]ssi_ssr_fck_3430es2ti,composite-clockssi_sst_fck_3430es2fixed-factor-clocksys_d2_ckfixed-factor-clock#Komap_96m_d2_fckfixed-factor-clockZLomap_96m_d4_fckfixed-factor-clockZMomap_96m_d8_fckfixed-factor-clockZNomap_96m_d10_fckfixed-factor-clockZ Odpll5_m2_d4_ckfixed-factor-clockPdpll5_m2_d8_ckfixed-factor-clockQdpll5_m2_d16_ckfixed-factor-clockRdpll5_m2_d20_ckfixed-factor-clockSusim_fckti,composite-clockdpll5_ck@d04ti,omap3-dpll-clock##  $ L 4 2dpll5_m2_ck@d50ti,divider-clock Psgx_gate_fck@b00ti,composite-gate-clock0v core_d3_ckfixed-factor-clock0core_d4_ckfixed-factor-clock0core_d6_ckfixed-factor-clock0omap_192m_alwon_fckfixed-factor-clock'core_d2_ckfixed-factor-clock0sgx_mux_fck@b40ti,composite-mux-clock 4 @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockH vcpefuse_fck@a08ti,gate-clock# vts_fck@a08ti,gate-clockI vusbtll_fck@a08ti,wait-gate-clock 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%mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetoneW\txrxfckick+okay defaultmcbsp@49026000ti,omap3-mcbspI`%mpu 67 commontxrxmcbsp4W\txrx fck +okaydefault %mcbsp@48096000ti,omap3-mcbspH `%mpu QR commontxrxmcbsp5W\txrx fck +disabledsham@480c3000ti,omap3-shamshamH 0d1WE\rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1%revsyscsyss/' <J fckick+ H11Etimer@0ti,omap3430-timer fck%P_ oItarget-module@49032000ti,sysc-omap2-timerti,syscI I I %revsyscsyss/' <J fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11,target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@%revsyscsyss/' <Jfckick+ H0@timer@0ti,omap3430-timer_Pusbhstll@48062000 ti,usbhs-tllH N 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Bantenna-detect gpio-keysgps-antenna-button DGPS_EXT_ANT P 7    a  Bsoundti,omap-twl4030 sgta04 |" #sound_telephonysimple-audio-card GTA04 voice $ $ i2s  ,simple-audio-card,cpu N%simple-audio-card,codec N&$gsm_codecoption,gtm601 &spi spi-gpio+default' X!  b! m! x! td028ttec1@0tpo,td028ttec1    (Dlcdportendpoint t)backlightpwm-backlight * backlight, (2<FPZd default+(pwm-11ti,omap-dmtimer-pwm , *hsusb2-phy-pinsusb-nop-xceiv connectorcomposite-video-connectorDtvportendpoint t-/opa362 ti,opa362 !ports+port@0endpoint t.port@1endpoint t/-wifi_pwrseqmmc-pwrseq-simplepinmux@48002274pinctrl-singleH"t+ ,X v#default0mcbsp1-devconf0-pins G0pinmux@480022d8pinctrl-singleH"+ ,X v#default1tv-acbias-devconf1-pins G1wlan_en_regulatorregulator-fixeddefault2wlan-en-regulatorw@w@  [p lpps pps-gpiodefault3 4 compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-highinterrupts-extendedsirf,onoff-gpioslna-supplyvcc-supplyti,enable-vibrati,ramp_delay_valueti,system-power-controllerbci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellslabellinux,default-triggerti,x-plate-ohmstouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressuretouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-inverted-yvdda-supplyvddd-supply#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthti,non-removablebroken-cdcap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optrb-gpiosnand-bus-widthgpmc,device-widthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-off-nsgpmc,we-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-clk-psmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyremote-endpointti,channelsti,invert-polaritydata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typeti,isp-clock-divisorti,strobe-modedata-shifthsync-activevsync-activedata-activepclk-sample#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelinux,codewakeup-sourcelinux,input-typedebounce-intervalti,modelti,mcbspti,jack-det-gpiosimple-audio-card,namesimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-inversionsound-daisck-gpiosmiso-gpiosmosi-gpioscs-gpiosnum-chipselectsspi-max-frequencyspi-cpolspi-cphabacklightpwmspwm-namesbrightness-levelsdefault-brightness-levelti,timersti,clock-sourcereset-gpiosenable-gpiospinctrl-single,bit-per-muxpinctrl-single,bitsstartup-delay-usenable-active-high