8(Qheadacoustics,omap3-hatechnexion,omap3-tao3530ti,omap3430ti,omap34xxti,omap3 +37TI OMAP3 HEAD acoustics baseboard with TAO3530 SOMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8scpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+,Jgdefaultu hsusbb2-pins`          mmc1-pinsP "$&mmc2-pins0(*,.02wlan-gpio-pins^uart3-pinsnApi2c3-pinsmcspi1-pins mcspi3-pins mcbsp3-pins <>@Btwl4030-pinsAsound2-pinsnled-blue-pins led-green-pins led-red-pins poweroff-pinspowerdown-input-pinsfpga-boot0-pins fpga-boot1-pins rtvxscm_conf@270sysconsimple-busp0+ p0 pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap pbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselh+clock-mcbsp5-mux-fck@4ti,composite-mux-clockmcbsp5_mux_fck clock-mcbsp3-mux-fck@0ti,composite-mux-clockmcbsp3_mux_fckclock-mcbsp4-mux-fck@2ti,composite-mux-clockmcbsp4_mux_fckmcbsp5_fckti,composite-clockclock@4 ti,clksel+clock-mcbsp1-mux-fck@2ti,composite-mux-clockmcbsp1_mux_fck clock-mcbsp2-mux-fck@6ti,composite-mux-clockmcbsp2_mux_fckmcbsp1_fckti,composite-clockmcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+,Jtwl4030-vpins-pins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H `  +disabledaes1@0 ti,omap3-aesP2  7txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P  +disabledaes2@0 ti,omap3-aesP2AB7txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockAY"osc_sys_ck@d40 ti,mux-clock !" @#sys_ck@1270ti,divider-clock#Q^pi(sys_clkout1@d70ti,gate-clock# pQdpll3_x2_ckfixed-factor-clock$dpll3_m2x2_ckfixed-factor-clock%'dpll4_x2_ckfixed-factor-clock&corex2_fckfixed-factor-clock')wkup_l4_ickfixed-factor-clock(hcorex2_d3_fckfixed-factor-clock)corex2_d5_fckfixed-factor-clock)clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockAomap_32k_fck fixed-clockANvirt_12m_ck fixed-clockAvirt_13m_ck fixed-clockA]@virt_19200000_ck fixed-clockA$virt_26000000_ck fixed-clockA virt_38_4m_ck fixed-clockAI!dpll4_ck@d00ti,omap3-dpll-per-clock(( D 0&dpll4_m2_ck@d48ti,divider-clock&^? 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sha12_ickbclock-icr-ick@29ti,omap3-interface-clockicr_ickbclock-des2-ick@26ti,omap3-interface-clock des2_ickbclock-mspro-ick@23ti,omap3-interface-clock mspro_ickbclock-mailboxes-ick@7ti,omap3-interface-clockmailboxes_ickbclock-sad2d-ick@3ti,omap3-interface-clock sad2d_ickMclock-hsotgusb-ick-3430es2@4"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2aclock-ssi-ick-3430es2@0ti,omap3-ssi-interface-clockssi_ick_3430es2c clock-mmchs3-ick@30ti,omap3-interface-clock mmchs3_ickbgpmc_fckfixed-factor-clockacore_l4_ickfixed-factor-clockObclock@e00 ti,clksel+clock-dss-tv-fckti,gate-clock dss_tv_fckGQclock-dss-96m-fckti,gate-clock dss_96m_fck_Qclock-dss2-alwon-fckti,gate-clockdss2_alwon_fck(Qclock-dss1-alwon-fck-3430es2@0ti,dss-gate-clockdss1_alwon_fck_3430es2ddummy_ck fixed-clockAclock@c00 ti,clksel +clock-gpt1-gate-fck@0ti,composite-gate-clockgpt1_gate_fck(fclock-gpio1-dbck@3ti,gate-clock gpio1_dbckeclock-wdt2-fck@5ti,wait-gate-clock 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gpio2_ick{clock-wdt3-ick@12 ti,omap3-interface-clock wdt3_ick{clock-uart3-ick@11 ti,omap3-interface-clock uart3_ick{clock-uart4-ick@18ti,omap3-interface-clock uart4_ick{clock-gpt9-ick@10 ti,omap3-interface-clock gpt9_ick{clock-gpt8-ick@9 ti,omap3-interface-clock gpt8_ick{clock-gpt7-ick@8ti,omap3-interface-clock gpt7_ick{clock-gpt6-ick@7ti,omap3-interface-clock gpt6_ick{clock-gpt5-ick@6ti,omap3-interface-clock gpt5_ick{clock-gpt4-ick@5ti,omap3-interface-clock gpt4_ick{clock-gpt3-ick@4ti,omap3-interface-clock gpt3_ick{clock-gpt2-ick@3ti,omap3-interface-clock gpt2_ick{clock-mcbsp2-ick@0ti,omap3-interface-clock mcbsp2_ick{clock-mcbsp3-ick@1ti,omap3-interface-clock mcbsp3_ick{clock-mcbsp4-ick@2ti,omap3-interface-clock mcbsp4_ick{emu_src_ckti,clkdm-gate-clock|0secure_32k_fck fixed-clockA}gpt12_fckfixed-factor-clock}wdt1_fckfixed-factor-clock}security_l4_ick2fixed-factor-clockO~clock@a14 ti,clksel +clock-aes1-ick@3ti,omap3-interface-clock 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gpio4{gpio@49056000ti,omap3-gpioI`!gpio5{gpio@49058000ti,omap3-gpioI"gpio6{serial@4806a000ti,omap3-uartH H2127txrxuart1Alserial@4806c000ti,omap3-uartHI2347txrxuart2Alserial@49020000ti,omap3-uartIJ2567txrxuart3Algdefaultui2c@48070000 ti,omap3-i2cH8+i2c1A'@twl@48H  ti,twl4030gdefaultuaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2 vdd_ehciw@w@regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio{twl4030-usbti,twl4030-usb *8A pwmti,twl4030-pwmLpwmledti,twl4030-pwmledLpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadWgmadcti,twl4030-madczi2c@48072000 ti,omap3-i2cH 9+i2c2 +disabledi2c@48060000 ti,omap3-i2cH=+i2c3Agdefaultumailbox@48094000ti,omap3-mailboxmailboxH @mbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@2#$%&'()* 7tx0rx0tx1rx1tx2rx2tx3rx3gdefaultuspi@4809a000ti,omap2-mcspiH B+mcspi2 2+,-.7tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 27tx0rx0tx1rx1gdefaultuspi@480ba000ti,omap2-mcspiH 0+mcspi42FG7tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc12=>7txrxgdefaultu mmc@480b4000ti,omap3-hsmmcH @Vmmc22/07txrxgdefaultu&4mmc@480ad000ti,omap3-hsmmcH ^mmc32MN7txrx +disabledmmu@480bd400Gti,omap2-iommuH mmu_ispT mmu@5d000000Gti,omap2-iommu]mmu_iva +disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< dcommontxrxtmcbsp12 7txrxfck +disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?dcommontxrxsidetonetmcbsp2mcbsp2_sidetone2!"7txrxfckick+okaymcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZdcommontxrxsidetonetmcbsp3mcbsp3_sidetone27txrxfckick+okaygdefaultumcbsp@49026000ti,omap3-mcbspI`mpu 67 dcommontxrxtmcbsp427txrxfck +disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR dcommontxrxtmcbsp527txrxfck +disabledsham@480c3000ti,omap3-shamshamH 0d12E7rx +disabledtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1timer@0ti,omap3430-timerfck%Ntarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHM6gpmc@6e000000ti,omap3430-gpmcgpmcn27rxtx;G+{0nand@0,0ti,omap2-nand  Yhzsw$$$0+H<HM6\+x-loader@0 nX-Loaderbootloaders@80000nU-Bootbootloaders_env@260000 nU-Boot Env&kernel@280000nKernel(@filesystem@680000 nFile Systemhtarget-module@480ab000ti,sysc-omap2ti,syscH H H revsyscsyss 6 fck+ H usb@0ti,omap3-musb\]dmcdmat  6  usb2-phy<2dss@48050000 ti,omap3-dssH +disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll +disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH +disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  +disabled dss_vencfckssi-controller@48058000 ti,omap3-ssissi+okayHHsysgddGdgdd_mpu+    ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+,Jisp@480bc000 ti,omap3-ispH H |  lports+bandgap@48002524H%$ti,omap34xx-bandgaptarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $sysc fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ Pgpu@0#ti,omap3430-gpuimg,powervr-sgx530opp-tableoperating-points-v2-ti-cpu opp-125000000sY@ opp-250000000沀 g8g8g8opp-500000000e OOOopp-550000000 U txtxtxopp-600000000#F pppopp-720000000*T pppthermal-zonescpu-thermal3AN Ntripscpu_alert^8jzpassivecpu_crit^_j zcriticalcooling-mapsmap0u zmemory@80000000smemoryhsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z phsusb2-phy-pinsusb-nop-xceiv Asoundti,omap-twl4030 omap3beagleregulator-mmc2-sdio-poweronregulator-fixedregulator-mmc2-sdio-poweron00 'gpio_poweroffgdefaultugpio-poweroff  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskstatusdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplycd-gpiosbus-widthnon-removablecap-power-off-card#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespoweriommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbsp