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i2c1_fckclock-mcbsp5-gate-fck@10 ti,composite-gate-clockmcbsp5_gate_fck clock-mcbsp1-gate-fck@9 ti,composite-gate-clockmcbsp1_gate_fck clock-mcspi4-fck@21ti,wait-gate-clock mcspi4_fckSclock-mcspi3-fck@20ti,wait-gate-clock mcspi3_fckSclock-mcspi2-fck@19ti,wait-gate-clock mcspi2_fckSclock-mcspi1-fck@18ti,wait-gate-clock mcspi1_fckSclock-uart2-fck@14ti,wait-gate-clock uart2_fckSclock-uart1-fck@13 ti,wait-gate-clock uart1_fckSclock-hdq-fck@22ti,wait-gate-clockhdq_fckTclock-modem-fck@31ti,omap3-interface-clock modem_fck"clock-mspro-fck@23ti,wait-gate-clock mspro_fckclock-ssi-ssr-gate-fck-3430es2@0 ti,composite-no-wait-gate-clockssi_ssr_gate_fck_3430es2#~clock-mmchs3-fck@30ti,wait-gate-clock mmchs3_fckgpt10_fckti,composite-clockUVgpt11_fckti,composite-clockWXcore_96m_fckfixed-factor-clockYcore_48m_fckfixed-factor-clock9Score_12m_fckfixed-factor-clockZTcore_l3_ickfixed-factor-clockG[clock@a10 ti,clksel +clock-sdrc-ick@1ti,wait-gate-clock sdrc_ick[clock-mmchs2-ick@25ti,omap3-interface-clock mmchs2_ick\clock-mmchs1-ick@24ti,omap3-interface-clock mmchs1_ick\clock-hdq-ick@22ti,omap3-interface-clockhdq_ick\clock-mcspi4-ick@21ti,omap3-interface-clock mcspi4_ick\clock-mcspi3-ick@20ti,omap3-interface-clock mcspi3_ick\clock-mcspi2-ick@19ti,omap3-interface-clock mcspi2_ick\clock-mcspi1-ick@18ti,omap3-interface-clock mcspi1_ick\clock-i2c3-ick@17ti,omap3-interface-clock i2c3_ick\clock-i2c2-ick@16ti,omap3-interface-clock i2c2_ick\clock-i2c1-ick@15ti,omap3-interface-clock i2c1_ick\clock-uart2-ick@14ti,omap3-interface-clock uart2_ick\clock-uart1-ick@13 ti,omap3-interface-clock uart1_ick\clock-gpt11-ick@12 ti,omap3-interface-clock gpt11_ick\clock-gpt10-ick@11 ti,omap3-interface-clock gpt10_ick\clock-mcbsp5-ick@10 ti,omap3-interface-clock mcbsp5_ick\clock-mcbsp1-ick@9 ti,omap3-interface-clock mcbsp1_ick\clock-omapctrl-ick@6ti,omap3-interface-clock omapctrl_ick\clock-aes2-ick@28ti,omap3-interface-clock aes2_ick\clock-sha12-ick@27ti,omap3-interface-clock sha12_ick\clock-icr-ick@29ti,omap3-interface-clockicr_ick\clock-des2-ick@26ti,omap3-interface-clock des2_ick\clock-mspro-ick@23ti,omap3-interface-clock mspro_ick\clock-mailboxes-ick@7ti,omap3-interface-clockmailboxes_ick\clock-sad2d-ick@3ti,omap3-interface-clock sad2d_ickGclock-hsotgusb-ick-3430es2@4"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2[clock-ssi-ick-3430es2@0ti,omap3-ssi-interface-clockssi_ick_3430es2]clock-mmchs3-ick@30ti,omap3-interface-clock mmchs3_ick\gpmc_fckfixed-factor-clock[core_l4_ickfixed-factor-clockI\clock@e00 ti,clksel+clock-dss-tv-fckti,gate-clock dss_tv_fckASclock-dss-96m-fckti,gate-clock dss_96m_fckYSclock-dss2-alwon-fckti,gate-clockdss2_alwon_fck"Sclock-dss1-alwon-fck-3430es2@0ti,dss-gate-clockdss1_alwon_fck_3430es2^dummy_ck fixed-clockCclock@c00 ti,clksel +clock-gpt1-gate-fck@0ti,composite-gate-clockgpt1_gate_fck"`clock-gpio1-dbck@3ti,gate-clock gpio1_dbck_clock-wdt2-fck@5ti,wait-gate-clock wdt2_fck_clock-sr1-fck@6ti,wait-gate-clocksr1_fck" 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