36 #define _AVR_SLEEP_H_ 1 138 #if defined(SLEEP_CTRL) 141 #define _SLEEP_CONTROL_REG SLEEP_CTRL 142 #define _SLEEP_ENABLE_MASK SLEEP_SEN_bm 143 #define _SLEEP_SMODE_GROUP_MASK SLEEP_SMODE_gm 145 #elif defined(SLPCTRL) 148 #define _SLEEP_CONTROL_REG SLPCTRL_CTRLA 149 #define _SLEEP_ENABLE_MASK SLPCTRL_SEN_bm 150 #define _SLEEP_SMODE_GROUP_MASK SLPCTRL_SMODE_gm 154 #define _SLEEP_CONTROL_REG SMCR 155 #define _SLEEP_ENABLE_MASK _BV(SE) 157 #elif defined(__AVR_AT94K__) 159 #define _SLEEP_CONTROL_REG MCUR 160 #define _SLEEP_ENABLE_MASK _BV(SE) 162 #elif !defined(__DOXYGEN__) 164 #define _SLEEP_CONTROL_REG MCUCR 165 #define _SLEEP_ENABLE_MASK _BV(SE) 172 #if defined(__AVR_ATmega161__) 174 #define set_sleep_mode(mode) \ 176 MCUCR = ((MCUCR & ~_BV(SM1)) | ((mode) == SLEEP_MODE_PWR_DOWN || (mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM1) : 0)); \ 177 EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM0) : 0)); \ 181 #elif defined(__AVR_ATmega162__) \ 182 || defined(__AVR_ATmega8515__) 184 #define set_sleep_mode(mode) \ 186 MCUCR = ((MCUCR & ~_BV(SM1)) | ((mode) == SLEEP_MODE_IDLE ? 0 : _BV(SM1))); \ 187 MCUCSR = ((MCUCSR & ~_BV(SM2)) | ((mode) == SLEEP_MODE_STANDBY || (mode) == SLEEP_MODE_EXT_STANDBY ? _BV(SM2) : 0)); \ 188 EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE || (mode) == SLEEP_MODE_EXT_STANDBY ? _BV(SM0) : 0)); \ 192 #elif defined(__AVR_XMEGA__) 194 #define set_sleep_mode(mode) \ 196 _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_SLEEP_SMODE_GROUP_MASK)) | (mode)); \ 203 #define set_sleep_mode(mode) \ 205 _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ 210 #define set_sleep_mode(mode) \ 212 _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ 217 #define set_sleep_mode(mode) \ 219 _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~_BV(SM)) | (mode)); \ 224 #error "No SLEEP mode defined for this device." 238 #if defined(__DOXYGEN__) 248 #define sleep_enable() \ 250 _SLEEP_CONTROL_REG |= (uint8_t)_SLEEP_ENABLE_MASK; \ 256 #if defined(__DOXYGEN__) 266 #define sleep_disable() \ 268 _SLEEP_CONTROL_REG &= (uint8_t)(~_SLEEP_ENABLE_MASK); \ 279 #if defined(__DOXYGEN__) 285 #define sleep_cpu() \ 287 __asm__ __volatile__ ( "sleep" "\n\t" :: ); \ 293 #if defined(__DOXYGEN__) 303 #define sleep_mode() \ 313 #if defined(__DOXYGEN__) 324 #if defined(BODS) && defined(BODSE) 328 #define BOD_CONTROL_REG BODCR 332 #define BOD_CONTROL_REG MCUCR 336 #define sleep_bod_disable() \ 339 __asm__ __volatile__("in %[tempreg], %[mcucr]" "\n\t" \ 340 "ori %[tempreg], %[bods_bodse]" "\n\t" \ 341 "out %[mcucr], %[tempreg]" "\n\t" \ 342 "andi %[tempreg], %[not_bodse]" "\n\t" \ 343 "out %[mcucr], %[tempreg]" \ 344 : [tempreg] "=&d" (tempreg) \ 345 : [mcucr] "I" _SFR_IO_ADDR(BOD_CONTROL_REG), \ 346 [bods_bodse] "i" (_BV(BODS) | _BV(BODSE)), \ 347 [not_bodse] "i" (~_BV(BODSE))); \
void sleep_bod_disable(void)