2. Disassembly

2. 1. Cone Mapping

The base object of the methodology is the "cone". Disassembly can be seen as a conversion of a network of non-oriented transistors into a network of oriented cones.

The starting point of any partitioning strategy is the identification of the nodes on which we intend to build a sub-network. The idea of Yagle disassembly is to build sub-networks between which there is no charge transfer. Therefore, the signals controlling transistor gates define the interface between two sub-networks, and the nodes for which a sub-network is extracted during the partitioning are the nodes driving at less one transistor gate.

The extracted sub-networks are called cones. A cone is a DC-connected object: it contains all the paths that link the node to a voltage source through the source-drain connections of the transistors.

Each cone has a unique output and a certain number of inputs: the signals controlling the gates of the cone's transistors.

The construction of a cone on a node N consists in identifying all the current paths between the node N and a voltage source (Vdd or Vss). We call a "branch" a path that links the node N to a voltage source.

2. 2. False Branches Detection

The symmetric nature of MOS transistors has a significant impact on the construction of branches. Without knowing the transistors orientation, we must construct all the paths towards the voltage sources. It is possible that the correlations on the signals controlling the gates block some current paths. We call those current paths "false branches".

As we can see in the next figure, it is the logical context -i.e. the correlations between the inputs of the cone- that allows to establish rigorously the transistors orientation. This logical context also allows the elimination of false branches.