Package: cocotb Version: 1.5.2-c4m.1+6.6 Architecture: amd64 Maintainer: Staf Verhaegen Installed-Size: 1980 Depends: libc6 (>= 2.14), libgcc-s1 (>= 3.3.1), libstdc++6 (>= 5.2), python Filename: amd64/cocotb_1.5.2-c4m.1+6.6_amd64.deb Size: 287760 MD5sum: 16f6328389cc5a4b9c271f294668210f SHA1: 63ed6220ab539335e45523179563ad2313ca14ef SHA256: ad57582d889eb2ecbd0ffff2ff786eb9f78dd752840dcd840bc565229a032680 Section: electronics Priority: extra Description: COroutine based COsimulation TestBench cocotb is a COroutine based COsimulation TestBench environment for verifying VHDL/Verilog RTL using Python. . cocotb is completely free, open source (under the BSD License) and hosted on GitHub. . cocotb requires a simulator to simulate the RTL. Simulators that have been tested and known to work with cocotb: . Linux Platforms * Icarus Verilog * GHDL * Aldec Riviera-PRO * Synopsys VCS * Cadence Incisive * Mentor ModelSim (DE and SE) . Windows Platform * Icarus Verilog * Aldec Riviera-PRO * Mentor ModelSim (DE and SE) . https://cocotb.readthedocs.io Package: cocotb-dbgsym Source: cocotb Version: 1.5.2-c4m.1+6.6 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Staf Verhaegen Installed-Size: 1700 Depends: cocotb (= 1.5.2-c4m.1+6.6) Filename: amd64/cocotb-dbgsym_1.5.2-c4m.1+6.6_amd64.deb Size: 1327808 MD5sum: 108e88b626bad9a810aa995e4ce7c345 SHA1: 8aba108f0c0ce78538a69d93ab831d7877fd1a23 SHA256: d55c1675963b8bd4af664fd7e58687a20dddd44a871fb9b17fcbb206df888a6e Section: debug Priority: optional Description: debug symbols for cocotb Build-Ids: 05751a71d9964c24ad67f47182323170023ffd2e 11638609007085e4ab4b9711322dc44956d2d8fb 234cf1eb525587644b4c32f368c308da0eb6ff92 2699f85f05310c6c85b21d14bfc300ad58559f17 369902a0ed97698e4802a8ae339b03de4af005df 42d5b6cfee7767545e3fd47f85343824ad0c9cd1 4cf54c5bd89c995c7faf1a404c1ee58b854c9ec9 5d44bf41fc7009bec7a90f57c2bb3fb336fca87f 922464cdf169bf8eb5abbd05bcf634652f02dcd7 92e62a9bfcf376355edf46ad10a33e8b0519c395 9e13eb92b4491a64a84f9bc5f80b5475a1ab6550 cbf59085f49ff5e34dfb583e002f022ee351b82b d7f02795c5a31ca975f1979fa914c0cf1ed8b44c Package: ghdl Version: 1.0.1.dev20210706.git1285cbf-c4m.1+4.6 Architecture: amd64 Maintainer: Chips4Makers Installed-Size: 20239 Depends: libc6 (>= 2.29), libgcc-s1 (>= 3.0), libgnat-10 (>= 10.2.1), zlib1g (>= 1:1.2.0) Filename: amd64/ghdl_1.0.1.dev20210706.git1285cbf-c4m.1+4.6_amd64.deb Size: 3030132 MD5sum: 4a3530ff00ef38ba6c84b49d9a45a059 SHA1: 422e3bbd2e889ae4f878fe7128c6bb39e601a920 SHA256: a90c006ef8fb8101868c11c01a806b1c2268521d1c4400be86c057c926ce423f Section: electronics Priority: extra Description: GHDL GHDL is the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language. 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Package: gtkwave-dbgsym Source: gtkwave Version: 3.3.110-c4m.1+3.6 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Staf Verhaegen Installed-Size: 3870 Depends: gtkwave (= 3.3.110-c4m.1+3.6) Filename: amd64/gtkwave-dbgsym_3.3.110-c4m.1+3.6_amd64.deb Size: 3561416 MD5sum: 1903bb53669603fdf7b8e84044e990c8 SHA1: 7c348b2c9bdbc602eb623451fdc32e08460396ae SHA256: ec3be861b237f4ad3eba2352a7a7534e1496ba6419a6bfd141ace13d2366d9ac Section: debug Priority: optional Description: debug symbols for gtkwave Build-Ids: 0f2aa3dbf75e7de55165a622e420998a39035d4e 144fe45281e7249a3a9192f4109289b41cdd8cb7 1954bdba03844d113386af30590dae188c26a6f8 24bc23591532dbcf3481a65baa808beedcec159b 45971af919fc9b583520ef9942c6991cc3ffebad 50ecfa7c76a33599717bad0b5764ed3c8decb4ae 79e10f19153f8a954b9979ef11d4c3c280eb7fe0 87e640bdb50cfbb2bf1546e141f2415b0a73f46a 8dffe8b3916ff79cd9ec1c81432ad12412cf1fc8 a38e800bc23cd29a3cd2b7c7d548c537cb363509 b7467864ef8f2f703bf6128bdb93bb215ed95880 c1db7da65bb94c04961175b50f6d4682e901bb46 c427d417451215b29ab84a98959eefdede282677 c68fecc3a61decc892b9acb9ba8e8f49832ec305 daeb3644cfa4422e02e9292c716f060744f13fda f2b3a39112cba9c2e9dd2acbeb51e4b79c35192e Package: iverilog Version: 11.0-c4m.1+4.6 Architecture: amd64 Maintainer: Chips4Makers Installed-Size: 6666 Depends: libc6 (>= 2.29), libgcc-s1 (>= 3.0), libreadline8 (>= 6.0), libstdc++6 (>= 5.2), zlib1g (>= 1:1.2.0) Filename: amd64/iverilog_11.0-c4m.1+4.6_amd64.deb Size: 1939312 MD5sum: b8d96700701c693e21df696c5a49a802 SHA1: 784e6f026064741552f099759777a33e4ac975e8 SHA256: 507274cb9b4d6a640799c47cc52087c30ebfd87a709969bdc5de0f07e9b3efc4 Section: electronics Priority: extra Description: Icarus Verilog Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. 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Package: iverilog-dbgsym Source: iverilog Version: 11.0-c4m.1+4.6 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Chips4Makers Installed-Size: 22305 Depends: iverilog (= 11.0-c4m.1+4.6) Filename: amd64/iverilog-dbgsym_11.0-c4m.1+4.6_amd64.deb Size: 21619692 MD5sum: 9d532894f4dc82af23e41cc487903191 SHA1: 1222cd985fe96adca2d142f2653936dc5590db24 SHA256: 2dd1329ef5ce2ce17501bad907963f4ffb3e65504ed2f8fc1e8dacd6e7305dec Section: debug Priority: optional Description: debug symbols for iverilog Build-Ids: 08f51d3b11a4d8cfb603caf8c84773c816d7622b 2466aebdddd3010283ebe2e6ddcf4417179ca04f 24b73606b1a380464b50df42e4162c0ca5c9672b 2c2bb12233c51e8915a3a8cfbef30f3958cdccef 31e6c354c41b94fecf2d4cc84ad46bac9e2cf06f 333ec09ba1a0955eec1042089e5a76195353a06d 336676f36b9d61a9bce59e074725e18f2fbd17c9 38b1e1e5d1aac5b2744ffb163715c28f1831da70 4d439f76f77bee831746ffa63ebb4986546fa9e6 58d19ed2992c1055b7d4fc4e54b65c9f21000303 62048883c70a35a10b1a11813ed4f10a2178a29d 71d00ad35916db798e7c9847a5d73fd49174ab8b 7d8c8300f7b14f3c7aca4a6374a583d18a8192de 981fe3df142bf029b1d0893a57ef79d589e15e4e a1b435df242173d8a21f72e36c499b385a5a9615 a2d6a491906c42d48a8439119738b85cb3ab0a0a a6c0b102be2ef82505c4e80add0ca59c54c1f694 a80bde7bde1e28c0eb708515d794878d674d968e b23bfbb7d5034ec8e24d1bb5ba74353d590ae3de b2817f17893e677cbb02fb9a305e13b7e6c55cac d0523e2d0d04b5750b073daa831aca5f754cdcee Package: klayout Version: 0.27.2-c4m.1+5.6 Architecture: amd64 Maintainer: Matthias Köfferlein Installed-Size: 183736 Depends: libc6 (>= 2.29), libgcc-s1 (>= 3.0), libpython3.9 (>= 3.9.1), libqt5core5a (>= 5.15.1), libqt5designer5 (>= 5.6.0~beta), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5multimedia5 (>= 5.6.0~beta), libqt5multimediawidgets5 (>= 5.6.0~beta), libqt5network5 (>= 5.14.1), libqt5printsupport5 (>= 5.4.0), libqt5sql5 (>= 5.10.0), libqt5svg5 (>= 5.6.0~beta), libqt5widgets5 (>= 5.15.1), libqt5xml5 (>= 5.1.0), libqt5xmlpatterns5 (>= 5.9.0), libruby2.7 (>= 2.7.0), libstdc++6 (>= 9), zlib1g (>= 1:1.1.4) Filename: amd64/klayout_0.27.2-c4m.1+5.6_amd64.deb Size: 34605164 MD5sum: cbb1cecadfc24f90b959a9dd93931d74 SHA1: 7ad839b95b817c3154ef2f4a9df3f22bbdfe0784 SHA256: ba00f0e71f0e8b6c190ab83ec549f9591df53e3ed3763cd72dd2c71de1a1393d Section: electronics Priority: optional Description: Chip mask layout review and edit utility Klayout is a graphical viewer and editor for a.o. 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Package: verilator-dbgsym Source: verilator Version: 4.106-c4m.1+6.6 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Staf Verhaegen Installed-Size: 103235 Depends: verilator (= 4.106-c4m.1+6.6) Filename: amd64/verilator-dbgsym_4.106-c4m.1+6.6_amd64.deb Size: 101114988 MD5sum: 13e0d43cd14159389db61ba8de3c3347 SHA1: 791101404155cd211c222477712ead3be04d4c9c SHA256: 9a9c9851f4b5f3e674b633f9b76ef10afd09f0429d709053a56bfd00d59bb486 Section: debug Priority: optional Description: debug symbols for verilator Build-Ids: 3ef1d119f9f2ec7297f0c039e95e79a061d8e63e 8cf50e609518602b10f19d663eb2323ca041b9a0 9e50cdb3a5ecedd450c6bebff9e36b66ea64fb60 Package: yosys Version: 0.9+4081-c4m.1+6.6 Architecture: amd64 Maintainer: Staf Verhaegen Installed-Size: 36699 Depends: libc6 (>= 2.29), libffi7 (>= 3.3~20180313), libgcc-s1 (>= 3.0), libreadline8 (>= 6.0), libstdc++6 (>= 9), libtcl8.6 (>= 8.6.0), zlib1g (>= 1:1.1.4) Filename: amd64/yosys_0.9+4081-c4m.1+6.6_amd64.deb Size: 10575192 MD5sum: 5350f03f7695d8f0f0a994557dbaf82b SHA1: 0829773c5a30d94da9809c2cdcae9f27ffe43286 SHA256: c1764f73f75bbd58eabd3c97fbda2ae367fb623dabdab7dd1b82c565b2cc6cd0 Section: electronics Priority: extra Description: Yosys Open SYnthesis Suite This is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . Yosys is free software licensed under the ISC license (a GPL compatible license that is similar in terms to the MIT license or the 2-clause BSD license). . http://www.clifford.at/yosys/ Package: yosys-dbgsym Source: yosys Version: 0.9+4081-c4m.1+6.6 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Staf Verhaegen Installed-Size: 5016 Depends: yosys (= 0.9+4081-c4m.1+6.6) Filename: amd64/yosys-dbgsym_0.9+4081-c4m.1+6.6_amd64.deb Size: 361140 MD5sum: 1d8b6f102b5e23b0659c184d03ec69ba SHA1: ecca71ede1551e1a6b870d1f508449a8f726722b SHA256: 2079eae54a3d28883b13a842ed03f9b6fae437c81dbea59dc83f8cbd90636c51 Section: debug Priority: optional Description: debug symbols for yosys Build-Ids: 1014560ce7ee9f403591a89d2ecb546453f5c895 93bcee868030aad97e22eb9aea7d05e72567bfb7